#include "DE15_ADS129x.h"
static uint32_t Value_4ADCCLK = (uint32_t)(10);
//static uint32_t Value_10ADCCLK = (uint32_t)(10);
//static uint32_t Value_50ADCCLK = (uint32_t)(10);
#define IS_CORRECT_REG_ADDR(ADDR)	( (ADDR) <= ADDR_REG_WCT2 )
extern SPI_HandleTypeDef hspi1;

void ADS129x_WriteOneByte(uint8_t Data)
{
  /*Wait until the last write is finished*/
  uint8_t dummy[1]={0};	
  HAL_SPI_TransmitReceive( &hspi1, &Data,&dummy[0] ,1, 0xFFF);
}
uint8_t ADS129x_ReadOneByte(void)
{
	uint8_t Data;
	uint8_t dummy[1]={0};
	//CS_ADS1298_ONLY;
	HAL_SPI_TransmitReceive(&hspi1,&dummy[0], &Data, 1, 0x3F);
	//CS_ADS129x_NONE;
	return Data;
 
}
void ADS129x_WREG(uint8_t StartREGAddress, uint8_t NumOFWR)
{
  if( IS_CORRECT_REG_ADDR(StartREGAddress) )
  {
	ADS129x_WriteOneByte(OPCODE_WREG | (StartREGAddress & 0x1F));
	ADS129x_WriteOneByte(NumOFWR & 0x1f);
  }
}

void ADS129x_RREG(uint8_t StartREGAddress, uint8_t NumOFRD)
{
  if( IS_CORRECT_REG_ADDR(StartREGAddress) )
  {
	ADS129x_WriteOneByte(OPCODE_RREG | (StartREGAddress & 0x1F));
	ADS129x_WriteOneByte(NumOFRD & 0x1f);
  }
}
uint8_t ADS129x_ReadRegister(uint8_t REGAddress)
{
  /*Send RREG command*/
  ADS129x_RREG(REGAddress, 0);
  return ADS129x_ReadOneByte();
}

void DE15_ADS129x_Config(void)
{
    
  //ADS129x_CtrlGPIO_Config();
  
  /*Connect <ADS1298_DRDY_PIN> to externline 9 interrupt to trigger the 333.33Hz sine wave generation*/
  //DE15_EXTILine9_Config();
  
  /*Initialize the SPI interface, and enable it*/
 // DE15_SPI_Config();
 // SPI_Cmd(SPI2, ENABLE);
  
  /*Use external 2.048MHz oscillator, and pull RESET pin and PWDN pin to low level*/

 
}

char ADS1298_Init(void)
{
	uint8_t i=0;
	uint8_t g_code=0x92;
	static uint8_t ch2set_val = 0;
	/*Chip select ADS1298*/
	HAL_Delay(1000);
	ADS1294R_PWDN_ACTIVE;
	ADS129x_RESET_ACTIVE;
	HAL_Delay(10);
    ADS129x_RESET_INACTIVE;	
	CS_ADS1298_ONLY;
    ADS129x_WriteOneByte(OPCODE_SDATAC);
	HAL_Delay(10);
	g_code=ADS129x_ReadRegister(ADDR_REG_ID);

//        /*-------------?????---------------*/
	ADS129x_WREG(ADDR_REG_CONFIG1, 0x03); 
	HAL_Delay(Value_4ADCCLK);
	ADS129x_WriteOneByte(0x85); //CONFIG1:HR??,???8KSPS,????0xC2,?????0x82
	HAL_Delay(Value_4ADCCLK);
	ADS129x_WriteOneByte(0x02); //CONFIG2????,0x02:not used; 0x11:test signal driven internally
	HAL_Delay(Value_4ADCCLK);
	ADS129x_WriteOneByte(0x6E); //CONFIG3????4V,???RLD??????0x76,????????????
	HAL_Delay(Value_4ADCCLK);
	ADS129x_WriteOneByte(0x87); //??LOFF???,AC,V/R???0x11  DC??0x03 ???:0x02

        HAL_Delay(Value_4ADCCLK);
        ADS129x_WREG(ADDR_REG_LOFF_SENSP, 0x01);
        HAL_Delay(Value_4ADCCLK);
        ADS129x_WriteOneByte(0x01); //LOFF_SENSP  0x3E
        HAL_Delay(Value_4ADCCLK);
        ADS129x_WriteOneByte(0x01); //LOFF_SENSN  0x3E
  
  
        ADS129x_WREG(ADDR_REG_PACE,0x01);
		 HAL_Delay(Value_4ADCCLK);
		 ADS129x_WriteOneByte(0x00);
		 		 HAL_Delay(Value_4ADCCLK);
		 ADS129x_WriteOneByte(0x3c);
        HAL_Delay(Value_4ADCCLK);
		ADS129x_WREG(ADDR_REG_CONFIG4, 0x02);
		HAL_Delay(Value_4ADCCLK);
		 ADS129x_WriteOneByte(0x02);
		 HAL_Delay(Value_4ADCCLK);
		  ADS129x_WriteOneByte(0x00);
		  HAL_Delay(Value_4ADCCLK);
		   ADS129x_WriteOneByte(0x00);
        /*---------?????CHnSET----------*/
        ADS129x_WREG(ADDR_REG_CH1SET, 0x07);
        for( i = 0; i < 8; i++)
        {
            HAL_Delay(Value_4ADCCLK);
            ADS129x_WriteOneByte(0x00);  
	      }

        ch2set_val = ADS129x_ReadRegister(ADDR_REG_CH1SET);
        ch2set_val = ch2set_val;
//        //??????
        HAL_Delay(Value_4ADCCLK);
        ADS129x_WREG(ADDR_REG_RLD_SENSP, 0x01);
        HAL_Delay(Value_4ADCCLK);
        ADS129x_WriteOneByte(0x01);
       HAL_Delay(Value_4ADCCLK);
        ADS129x_WriteOneByte(0x01);
//        
        HAL_Delay(Value_4ADCCLK);
        ADS129x_WREG(ADDR_REG_LOFF_SENSP, 0x02);
        HAL_Delay(Value_4ADCCLK);
        ADS129x_WriteOneByte(0xFF);
        HAL_Delay(Value_4ADCCLK);
        ADS129x_WriteOneByte(0xFF);
        HAL_Delay(Value_4ADCCLK);
        ADS129x_WriteOneByte(0x00);

	ADS129x_ADC_START;
	HAL_Delay(Value_4ADCCLK);
	CS_ADS1298_ONLY;
	ADS129x_WriteOneByte(OPCODE_RDATAC);
	return  g_code;
}

